How to test the LDPC of 3D NAND?


With the widely promotion of 3D NAND Flash in the market, LDPC has became a key marketing advertisement by all flash vendors.   

From the point of ECC, there is indeed no more powerful error correction algorithm than LDPC.

But on the contrary, there also exists disagreements. Although the LDPC has been used by HDD for years, it is still unverified by the market when used in NAND Flash. In theory, LDPC is also with own defects.

1.       The latency time of LDPC is extremely long due to the process of iteration.

2.      The Soft Information is necessary. It’s easy to get the Soft Information of HDD at once, but it’s difficult to get the accurate Soft Information of NAND Flash. Once you get the wrong information, the result could be disastrous. Because the LDPC need to calculate the probability with the Soft Information, if the decoder of LDPC gets the wrong Soft Information, it will lead the wrong information be enlarged continuously during calculation.

3. NAND Flash has its own feature –write error. For example, some cells are broken, but not read error. Once there is write error, you can only have the wrong information no matter how you want to get the Soft Information. Inputting the wrong Soft Information to LDPC will definitely lead to errors. And such errors cannot be changed, which will cause high Error Floor of LDPC decoding.

 4.      The LDPC is uncontrollable and incalculable.  


So how to test the LDPC?

1.       Prepare the LDPC code word.

2.      Open the operation interface of NFA100-E and perform the following steps: settings- pattern- settings- block- program- buffer pattern. Then write the LDPC code word into NAND Flash.


3.  To get the LLR data. Before this operation, you need to know the special “read” command from NAND Flash vendors. For example, READ OFFSET by Micron, SHIFT READ by Toshiba, etc.. Such read command can modify the threshold voltage sent to NAND Flash read command. Different threshold voltages may output different results. Based on these information you can generate your own LLR. 


You can read three times for one bit with Vth0-2, and output three results, like 1, 1, 0. With these 3 bits you can define your own LLR algorithm, thereby to get your LLR information.


4.  Input the generated LLR to the offline LDPC decoder engine on the PC side to analyze the LDPC information. 

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