Industrial & Military standard SSD

Part 1 - Principle of Nand Flash Storage                                         (Basic architecture of a Cell) As we know that all the data store as “0” and “1” in computers, so in theory if the storage unit can provide two or more recognized status, it can be used for data recording. 1. “Write” Data When writing data, we need to apply high voltage to the Control Gate , and allowing electrons flows into the N-Channel which is between the Source and Drain , when the current is strong enough, electrons gain sufficient energy and then will cross the SiO2 layer (which is under the Floating Gate ), finally being captured by the Cell, we call the whole process as “ Tunnel Effect ”. 2. Data Stabilization Once the electrons enter into the Floating Gate, they can’t get away from the SiO2 layer if there is not enough energy, even turn off the power supply, then the statue o...

The video in my former article showed the process of physical destruction, while we only witnessed the NAND Flashes being burned one by one, then what is the true image of a burned NAND Flash? Thanks to our cute colleagues for detaching the NAND Flashes from the SSD and getting them “skinned”, now we can have a look at the destructed NAND Flashes. First, we can see varying degrees of rips or blisters on the back side and front side of the detached NAND Flashes, leaking or fractured metal wires are visible to naked eyes, it seems remain fairly “intact". While let us observe the rip with microscope:. And our grinding kits: After grinding off the surface, extremely deep scorch-marks which almost drilled through to the surface from the bottom can be observed. The two questions our companions are deeply concerned: 1. What has been burned in NAND Flash was IO or DIE? 2. Why not just burn all the NAND Flashed in one time which is faster but choose t...

In ITS (Intelligent Transportation Systems), PIS (Passenger Information System) and other embedded in-vehicle application, such as video surveillance, data recorder…usually or sometimes the voltage changes unstably, SSD as embedded memory and storage device when doing data video recording is aggressively affected by the unstable input voltage.   First of all, please let me introduce RBER (Raw-Bit Error Rate), RBER is the Bit Error Rate before ECC (Error Correction Code) performing, reflects the initial reliability of Nand flash. The higher RBER, the less reliability of Nand flash. Then, how Input Voltage Affects the Nand Flash of SSD? Firstly, per 0.3V as a voltage difference in set time, the below graph is 3.3V-3.6V fluctuation. (1) When setting 2.7V - 3.V (standard voltage range of NAND flash), the RBER of NAND flash is 10^(-5.850), which is in normal range. (2) When setting as 3.6V - 3.9V, the RBER begins to increase, reach at 10^(-5.845). (...

NAND Flash тестер (NFA100-E) разработана для контроллера флэш-памяти разработки инженеров, профессоров, мастеров или врачей, которые занимаются исследованием NAND Flash и персонала от конкретных учреждений, выполняющих исследования по надежности флэш-памяти. Поддержка NAND Flash 1. Поддержка 3D-памяти NAND с новейшим процессом, 1xnm, 25 нм, 34 нм и 56nm NAND 2. Поддержка SLC, MLC, TLC и eMLC Тип памяти NAND 3. Поддержка 8-битных и 16-битный асинхронный NAND 4. Поддержка Синхронное, Toggle NAND 5. Поддержка регулярных NAND от Micron, Toshiba, Samsung, Intel, Sandisk, Hynix 6. Поддержка памяти NAND с TSOP48, BGA63, BGA100, BGA132 и пакет BGA152 7. Индивидуальные разъем для памяти NAND с нетрадиционным пакетом Спец. Назначение 1. Проверьте способность МПБ ECC или LDPC собственной разработки 2. Тест чтения Retry 3. Тест NAND Flash при напряжении переменного 4. Проверка физического уничтожения над NAND Flash техническое описание продукта и ценообразование: may@renice-tech...