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Showing posts with the label Nand Flash Reliability

How to read the reliability of each MLC Nand chip from Page performance?

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If all Page performance is basically the same when programming every time, this Nand Flash chip should be the most stable and reliable. Therefore, you can know the reliability of Nand Flash by observing the distribution of each Page performance. Although the datasheet for each Nand Flash chip will indicate detailed time of Erase, Program, and Read Performance , in fact, these Performances average the Lower page and the Upper Page, so it will mislead people that the performance of each page is the same, actually it is not. Renice test setting and idea: Take a new 3D Nand Flash for example, choose 1024 (03FF) Block, Program/Erase for 1000 times. The more stable the graph shows, the more reliable the Nand Flash is, if the graph floats drastically, the worse stability of the Nand flash. It looks stable when Page0 program A not ideal Lower Page test result as following. A not ideal Upper Page test result as following. Conclusion: the...