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Renice Nand Flash Test System NFA100 Introduction

NFA100 is an extremely powerful and flexible NAND Flash testing platform, clients can test  NAND Flash parameters by using NFA100 system commands and even reprocess these parameters for eventual product development. Clients also can realize their specific testing requirements through API or usage of script commands. Specification: Supports 3D NAND with newest  process, 1x nm and 25nm, 34nm,  56nm Nand. Supports SLC,MLC,TLC,eMLC. Supports 8-bit and 16-bit  Asynchronous Nand. Supports Aynchronous, Toggle Flash. Supports regular NAND from Micron, Toshiba, Samsung, Intel, Sandisk and  Hynix. Supports Nand with TSOP48, BGA63,  BGA100, BGA132, BGA152  packagage. Custom and develop unconventional  and self-defined packaged Nand. Test customer’s self-developed BCH ECC or LDPC  intensity. Test Read Retry. Test NAND Flash at varying voltage. Test of physical destroy over NAND Flash ... To learn more, please refer to NFA100 manual ...

About SSD AES-encryption

Self-encrypting drives use an encryption engine built into the SSD’s controller to encrypt every file stored on the drive. The purpose of AES Encryption is to convert standard input data known as plaintext to an unintelligible output known as cipher text. So if AES encryption on SSD used for data randomization function only, it only provides some data protection in the sense that if the controller is damaged, a 3rd party would not be able to read the data on the flash. In normal usage, however, there would be no data protection as any party that is in possession of the drive can read the data. Methods of using AES on SSD to Secure Data Hardware-based Encryption Self-encrypting drives include dedicated AES encryption engines that do not require software to run on the host. The randomized AES encryption keys are generated at product initialization using the controller’s true random number generator and encrypted in the SSD. This could also be implemented by a Trusted Platform Modu...

Renice release new X7 series MLC 1TB mSATA SATAIII 6.0Gbps SSD, -40°C to +85°C

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Form Foctor: mSATA(MO-300) Host interface: SATAIII 6.0Gbps Sequential Read/Write performance: 500/300MB/s Random4k Read/Write performance: 50K/ 50K Power Consumption (Active): 5.1W Operating Temp.: -40°C~+85°C Supports DRAM ECC Supports Encryption mode Supports Hardware Secure erase/ Write protection Supports Military Secure Erase protocol To learn more, please do not hesitate to contact sales@renice-tech.com

Renice X7 2.5" SATA/NVMe 2TB 4TB 8TB Industrial SSD, -40°C to +85°C

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Form Factor: 2.5 inch SATA Revision 3.0; compatible with SATA 6Gb/s, 3Gb/s and 1.5Gb/s interface rates Size: 100.45 x 69.85 x 7.0 (or 15.0) mm Capacity: 1TB, 2TB, 4TB, 8TB Sequential 128KB Read: Up to 520 MB/s Sequential 128KB Write: Up to 500 MB/s Random 4KB Read: Up to 70,000 IOPS Random 4KB Write: Up to 70,000 IOPS Read/Write Latency: 65μs/40μs (TYP) Operating Temperature: -40°C to +85°C Non-Operating: -45°C to +90°C Shock (operating and non-operating): 1,000 G/0.5ms Vibration 6 Operating: 16.3 GRMS (10-2,000 Hz) MTBF: 1.5 million hours 3 Power consumption Active: Up to 6.09W (8TB, Avg.) Idle: Up to 2.73W (8TB, Avg.) Product Ecological Compliance: RoHS To learn more, please email sales@renice-tech.com

The advantages of X9 R-SATA SSD

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Renice X9 R-SATA Technical Highlight 1. Secure Erase, support Physical Destroy and Logical Destroy 1.1. Physical destroy Implemented by HW button, with time-sharing shunt design to guarantee each NAND Flash been destroyed. The disk is scraped after destroy and data cannot be recovered by any means. 1.2. Logical destroy Support SW and HW methods. 1.2.1 After data destruction, the disk cannot be recognized by HOST, and data cannot be recovered by any means; 1.2.2 After destruction, all data in disk become FF, cannot be recovered. The disk is enabling to be used after initialization. 2. r-Backup technical patent, to keep the integrity of data information under abnormal power-off even when capacitor aging after years usage; 3. Exclusive Non-Balance wear-leveling technology, to increase the lifespan of the disk. 4. Support write-protect function 5. Support the only corresponds: the disk and the host computer. The destruction will be started automatically when the d...

Is the P/E cycle of MLC really only 3,000 times as its datasheet said?

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Firstly, let’s see the conclusion that Renice draw based on the test from Nand Flash test platform NFA100. 1, the P/E cycle of some Block up to 20,000 times in real test, though it said only 3,000 times in datasheet. 2, Each block is an independent individual, and the initial condition of each block is not exactly the same, even though they are the same process in the same production line. 3, No matter it’s original Nand Flash or non-original, they have the necessity of testing, the Nand Flash can be sorted and classified into different levels. 4, Though it is the same Nand Flash chip, the health condition of each Block is not the same 5, The real lifetime (P/E cycle) of Nand Flash may be far greater than its datasheet, only when test, it can play the greater value. 6, Deep understanding of the life performance of Nand Flash in different P/E stages can help better plan ECC. 7, For those who want to convert MLC mode to SLC at a certain stage, when to start ...

How to read the reliability of each MLC Nand chip from Page performance?

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If all Page performance is basically the same when programming every time, this Nand Flash chip should be the most stable and reliable. Therefore, you can know the reliability of Nand Flash by observing the distribution of each Page performance. Although the datasheet for each Nand Flash chip will indicate detailed time of Erase, Program, and Read Performance , in fact, these Performances average the Lower page and the Upper Page, so it will mislead people that the performance of each page is the same, actually it is not. Renice test setting and idea: Take a new 3D Nand Flash for example, choose 1024 (03FF) Block, Program/Erase for 1000 times. The more stable the graph shows, the more reliable the Nand Flash is, if the graph floats drastically, the worse stability of the Nand flash. It looks stable when Page0 program A not ideal Lower Page test result as following. A not ideal Upper Page test result as following. Conclusion: the...